Cambridge, United Kingdom
Posted 4 months ago
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Strong FPGA/SoC design background with RTL skills in (System) Verilog and scripting skills in languages such as TCL, Python,, etc.
Experience implementing designs on AMD Xilinx UltraScale devices using the Vivado tool suite.
Detailed understanding of timing...
Compensation
up to £600 per day
Role type
Intern
Visa sponsorship
Not provided
Benefits & perks
$81K - 125K
Full time
Remote
2022-08-20T14:00:12.865Z
$81K - 125K
Full time
Remote
2022-08-20T14:00:12.865Z
$81K - 125K
Full time
Remote
2022-08-20T14:00:12.865Z
Ground Floor, Verse Building, 18 Brunswick Place, London, N1 6DZ
108 E 16th Street, New York, NY 10003
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